Low Power and High Speed D-Latch Circuit Designs Based on Carbon Nanotube FET

  • Authors

    • Neda Talebipoor electronic engineering department,IA University,science and research branch branch,kerman,iran;
    • Peiman Keshavarzian head of computer engineering department,IA University,kerman branch,kerman,iran;
    • Behzad Irannejad

    Received date: September 24, 2012

    Accepted date: October 6, 2012

    Published date: November 16, 2012

    https://doi.org/10.14419/ijet.v2i1.483

  • Abstract

    In this paper we propose low power and high speed D-latche circuits base on carbon nanotube field effect transistor. D-latches are the important state-holding elements and systems performance enhancement will be achieved by improving the flip-flop latches structure. The circuit designs are simulated by Hspice .In this paper the consumption result of the circuit parameters such as delay, power and PDP for our three different D-latch circuit design in various voltages and different temperatures.

  • Downloads

  • How to Cite

    Talebipoor, N., Keshavarzian, P., & Irannejad, B. (2012). Low Power and High Speed D-Latch Circuit Designs Based on Carbon Nanotube FET. International Journal of Engineering and Technology, 2(1), 12-16. https://doi.org/10.14419/ijet.v2i1.483

    Received date: September 24, 2012

    Accepted date: October 6, 2012

    Published date: November 16, 2012