K.R, GokulAnand; N.R, Rajalakshmi; K, Saravanan; K, Venkatachalam. Performance analysis of VLSI floor planning based on artificial bee colony algorithm.
International Journal of Engineering and Technology,
[S. l.], v. 7, n. 2.33, p. 755–758, 2018.
DOI: 10.14419/ijet.v7i2.33.15490. Disponível em: https://sciencepubco.com/index.php/IJET/article/view/15490.. Acesso em: 28 apr. 2025.