Optimizing dielectric constants for enhanced performance in nanoscale DG-FinFETs: A comprehensive study on short channel effects

  • Authors

    • Nura Muhammad Shehu Department of Physics, Bayero University, Kano, Nigeria
    • Garba Babaji Department of Physics, Bayero University, Kano, Nigeria
    • Mutari Hajara Ali Department of Physics, Bayero University, Kano, Nigeria
  • DG-FinFETs; Dielectric Constant; Efficiency; PADRE; Short Channel Effects; Threshold Voltage
  • This study explores how variations in fin and gate dielectric constants impact nanoscale, DG-FinFETs’ sensitivity to Short Channel Effects (SCEs). Various fin (channel) materials; Gallium Arsenide (GaAs), Gallium Antimonide (GaSb), Gallium Nitride (GaN), and Silicon (Si), are considered. PADRE simulation environment is used to investigate the threshold Voltage (Vth) Roll-off, a crucial performance parameter. GaAs-FinFET, with a gate dielectric and fin dielectric constant values of 15 and 45 shows the lowest threshold voltage of 0.412 V. The study concludes that FinFETs with a higher fin dielectric constant than gate dielectric constant exhibit reduced SCEs, leading to lower power consumption, faster switching, and improved efficiency. This underscores the importance of optimizing dielectric constants, especially the fin dielectric constant, for enhanced DG-FinFET performance.

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    Nura Muhammad Shehu, Garba Babaji, & Mutari Hajara Ali. (2024). Optimizing dielectric constants for enhanced performance in nanoscale DG-FinFETs: A comprehensive study on short channel effects. International Journal of Basic and Applied Sciences, 13(1), 1-6. https://doi.org/10.14419/y4q1p726