Design of voltage level shifter for power-efficient applications using 45nm technology

  • Authors

    • P Sahithi
    • K Hari Kishore
    • E Raghuveera
    • P Gopi Krishna
    2018-03-19
    https://doi.org/10.14419/ijet.v7i2.8.10339
  • Conventional Level Shifter, Dynamic Level Shifter, Leakage Voltage, Level Shifter with Wilson Current Mirror, 45nm Technology, Voltage, Power Consumption, Gain and Gain Bandwidth Product (GBW).

  • The paper describes a voltage level shifter for power efficient applications which is simulated in tanner spice tool using 45nm technology. The conservative voltage level shifter is designed by using 6 transistors. The voltage level shifter cell generally used for shifting the voltage range of the signal from one voltage domain to another. This is required when the chip operate at multiple voltage domains. The circuit parameters like leakage voltage and average power dissipation are calculate for this circuit. Mainly level shifter consists of two voltage levels. One is low logic supply voltage (VDDL) another one is high logic supply voltage (VDDH). The simulation results of proposed level shifter with Wilson current mirror by 45nm technology for the input frequency of 1MHZ, the power dissipation of 0.177nW with 3db gain of 9.78.

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  • How to Cite

    Sahithi, P., Hari Kishore, K., Raghuveera, E., & Gopi Krishna, P. (2018). Design of voltage level shifter for power-efficient applications using 45nm technology. International Journal of Engineering & Technology, 7(2.8), 103-108. https://doi.org/10.14419/ijet.v7i2.8.10339