Performance analysis of number theoretic transform-based convolution using field programmable gate array

  • Authors

    • G A.E Satish Kumar
    2018-03-19
    https://doi.org/10.14419/ijet.v7i2.8.10409
  • Convolution, Number Theoretic Transform, VHDL, Xilinx Spartan FPGA

  • Abstract

    This paper presents the convolution operation based on the Number Theoretic Transfom for two n=8 input sequences. The convolution of two n-point sequences using Fast Fourier Transform exhibits design complexity leading to high power consumption. The Number Theoretic Transform utilizes the matrix of modulus values to evaluate the convolution. The Number Theoretic Transform is as an integer transform which makes the design comparatively simple. The convolution based Number Theoretic Transform is developed using the Very High Speed Integrated Circuit Hardware Description language.Also the real time implementation of the proposed method is validated by the Xilinx Spartan FPGA family devices. The performance analysis of power, speed and area are evaluated and compared with 3A DSP FPGA and Virtex 6 FPGA devices.

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  • How to Cite

    A.E Satish Kumar, G. (2018). Performance analysis of number theoretic transform-based convolution using field programmable gate array. International Journal of Engineering & Technology, 7(2.8), 204-210. https://doi.org/10.14419/ijet.v7i2.8.10409

    Received date: 2018-03-21

    Accepted date: 2018-03-21

    Published date: 2018-03-19