Neural network controller based sequential switch cascaded H-bridge multilevel inverter
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2018-03-19 https://doi.org/10.14419/ijet.v7i2.8.10527 -
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Abstract
This paper presents a novel cascaded multilevel inverter structure with reduced devices. This structure is termed as sequential switch cascaded multilevel inverter. The basic asymmetrical hybrid circuit is described and is capable of generating 17 voltage levels. The various modes of deriving 17 levels are explained and the proposed topology is compared with existing topologies in various aspects. Neural network controller can be used to generate the gating pulses. The algorithm can be trained online by using back propagation algorithm and also an algorithm to determine the number of levels, maximum voltage ratings and power loss is explained. The simulation can be done by MATLAB Simulink.
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References
- [1] K. Sivakumar, A. Das, R. Ramchand, C. Patel, and K. Gopakumar, “A Five-level Inverter Scheme for a Four-pole Induction Motor Drive By Feeding the Identical Voltage-profile Windings From Both Sides,†IEEE Trans. Ind. Electron., vol. 57, no. 8, pp. 2776–2784, Aug. 2010.[2] C. Cecati, F. Ciancetta, and P. Siano, “A Multilevel Inverter for PV Systems With Fuzzy Logic Control,†IEEE Trans. Ind. Electron., vol. 57, no. 12, pp. 4115–4125, Dec. 2010
[3] R. ShalchiAlishah, S. H. Hosseini, M. Sabahi, E. Babaei, “A New General Multilevel Converter Topology Based on Cascaded Connection of Sub-Multilevel Units with Reduced Switching Components, DC Sources and Blocked Voltage by Switches,†IEEE Trans. Ind. Electron., vol. 63, no. 11, pp. 7157–7164, Nov. 2016.
[4] C. Govindaraju and K. Baskaran, “Efficient Hybrid Carrier Based Space Vector Modulation for a Cascaded Multilevel Inverter,†Journal of Power Electronics, Vol. 10, No. 3, pp.277-284, May 2010.
[5] M.Kaliamoorthy, V.Rajasekaran, I.Gerald Christopher Rai, L.Hubert Tony Raj, “ Experimental Validation of Cascaded Single Phase H-Bridge Inverter With a Simplified Switching Algorithmâ€, Journal of Power Electronics, Vol.14, No.3, pp.507-518, May 2014.
[6] R.Kannan, Mohd.Ali.JagabarSathik,S.Selvam, “A New Symmetrical Multilevel Inverter Topology Using single and Double Source Sub-multilevel Invertersâ€, Journal of Power Electronics, Vol.15, No.1, pp. 96-105, Jan 2015.
[7] C. Chen, G. P. Adam, S. Finney, J. Fletcher, B. Williams, “H-bridge Modular Multi-level Converter: Control strategy for Improved DC Fault Ride-through Capability Without Converter Blocking,†IET Power Electronics, vol. 8, no. 10, pp. 1996-2008, Aug. 2015.
[8] A. Lesnicar, R. Marquardt, “An Innovative Modular Multilevel Converter Topology Suitable for a Wide Power Range,†IEEE Power Tech. Conf. Proc., Bologna, Jun. 2003
[9] Nabae, I. Takahashi, and H. Akagi, “A new neutral-point-clamped PWM inverter,†IEEE Trans. Ind. Appl., vol. 1A-17, no. 5, pp. 518–523, 1981.
[10] T. A. Meynard, H. Foch, F. Forest, C. Turpin, F. Richardeau, L. Delmas, G. Gateau, and E. Lefeuvre, “Multicell converters: Derived topologies,†IEEE Trans. Ind. Electron., vol. 49, no. 5, pp. 978–987, Oct. 2002.
[11] E. Samadaei, S. Gholamian, A. Sheikholeslami, J. Adabi., “An Envelope Type (E-Type) Module: Asymmetric Multilevel Inverters with Reduced Components,†IEEE Trans. Ind. Electron., vol. 63, no. 11, pp. 7148–7156, Nov. 2016.
[12] M. R. Banaei, E. Salary, H. Khounjahan, “A Ladder Multilevel Inverter Topology with Reduction of On-state Voltage Drop,†Gazi University Journal of Science, vol. 1, no. 1, pp. 1-9, Mar. 2013
[13] E. Babaei, “A cascade multilevel converter topology with reduced number of switches,†IEEE Trans. Power Electron., vol. 23, no. 6, pp. 2657–2664, Nov. 2008.
[14] E. Babaei, S. Alilu, S. Laali, “A New General Topology for Cascaded Multilevel Inverters With Reduced Number of Components Based on Developed H-Bridge,†IEEE Trans. Ind. Electron., vol. 61, no. 8, pp. 3933-3939, 2014.
[15] J. Ebrahimi, E. Babaei, and G. B. Gharehpetian, “A new topology of cascaded multilevel converters with reduced number of components for high-voltage applications,†IEEE Trans. Power Electron., vol. 26, no. 11, pp. 3119-3130, Nov. 2011.
[16] J. Ebrahimi, E. Babaei, and G.B. Gharehpetian, “A New Multilevel Converter Topology With Reduced Number of Power Electronic Components,†IEEE Trans. Ind. Electron., vol. 59, no. 2, pp.655-667, Feb. 2012.
[17] Buccella, C. Cecati, M.G. Cimoroni, K. Razi, “Analytical Method for Pattern Generation in Five-Level Cascaded H-Bridge Inverter Using Selective Harmonic Elimination,†IEEE Trans. Ind. Electron., vol. 61, no. 11, pp. 5811-5819, Nov. 2014.
[18] R. Nagarajan and M. Saravanan, “Performance analysis of a novel reduced switch cascaded multilevel inverter,†Journal of Power Electronics, Vol. 14, No. 1, pp. 48-60, Jan. 2014
[19] Y. Sun, W. Xiong, M. Su, H. Dan, X. Li, J. Yang, “Modulation Strategies Based on Mathematical Construction Method for Multi-modular Matrix Converter,†IEEE Trans. Power Electronics, vol. 31, no. 8, pp. 5423-34, Aug. 2016
[20] R. ShalchiAlishah, D. Nazarpour, S. H. Hosseini, M. Sabahi, “Reduction of Power Electronic Elements in Multilevel Converters Using a New Cascade Structure,†IEEE Trans. Ind. Electron., vol. 62, no. 1, pp.256-269, Jan. 2015
[21] S. P. Gautam, L. K. Sahu, S. Gupta, “Reduction in Number of devices for symmetrical and asymmetrical multilevel inverters,†IET Power Electronics, vol. 9, no. 4, pp. 698–709, Mar. 2016.
[22] R. Kalaivani, K. Ramash Kumar, S. Jeevananthan, “Implementation of VSBSMC plus PDIC for Fundamental Positive Output Super Lift-Luo Converter,†Journal of Electrical Engineering, Vol. 16, Edition: 4, 2016, pp. 243-258.
[23] K. Ramash Kumar,â€Implementation of Sliding Mode Controller plus Proportional Integral Controller for Negative Output Elementary Boost Converter,†Alexandria Engineering Journal (Elsevier), 2016, Vol. 55, No. 2, pp. 1429-1445.
[24] P. Sivakumar, V. Rajasekaran, K. Ramash Kumar, “Investigation of Intelligent Controllers for Varibale Speeed PFC Buck-Boost Rectifier Fed BLDC Motor Drive,†Journal of Electrical Engineering (Romania), Vol.17, No.4, 2017, pp. 459-471.
[25] K. Ramash Kumar, D.Kalyankumar, DR.V.Kirbakaran†An Hybrid Multi level Inverter Based DSTATCOM Control, Majlesi Journal of Electrical Engineering, Vol. 5. No. 2, pp. 17-22, June 2011, ISSN: 0000-0388.
[26] K. Ramash Kumar, S. Jeevananthan, “A Sliding Mode Control for Positive Output Elementary Luo Converter,†Journal of Electrical Engineering, Volume 10/4, December 2010, pp. 115-127.
[27] K. Ramash Kumar, Dr.S. Jeevananthan,†Design of a Hybrid Posicast Control for a DC-DC Boost Converter Operated in Continuous Conduction Mode†(IEEE-conference PROCEEDINGS OF ICETECT 2011), pp-240-248, 978-1-4244-7925-2/11.
[28] K. Ramash Kumar, Dr. S. Jeevananthan,†Design of Sliding Mode Control for Negative Output Elementary Super Lift Luo Converter Operated in Continuous Conduction Modeâ€, (IEEE conference Proceeding of ICCCCT-2010), pp. 138-148, 978-1-4244-7768-5/10.
[29] K. Ramash Kumar, S. Jeevananthan, S. Ramamurthy†Improved Performance of the Positive Output Elementary Split Inductor-Type Boost Converter using Sliding Mode Controller plus Fuzzy Logic Controller, WSEAS TRANSACTIONS on SYSTEMS and CONTROL, Volume 9, 2014, pp. 215-228.
[30] N. Arunkumar, T.S. Sivakumaran, K. Ramash Kumar, S. Saranya, â€Reduced Order Linear Quadratic Regulator plus Proportional Double Integral Based Controller for a Positive Output Elementary Super Lift Luo-Converter,†JOURNAL OF THEORETICAL AND APPLIED INFORMATION TECHNOLOGY, July 2014. Vol. 65 No.3, pp. 890-901.
[31] Arunkumar, T.S. Sivakumaran, K. Ramash Kumar, “Improved Performance of Linear Quadratic Regulator plus Fuzzy Logic Controller for Positive Output Super Lift Luo-Converter,†Journal of Electrical Engineering, Vol. 16, Edition:3, 2016, pp. 397-408.
[32] T. Padmapriya and V. Saminadan, “Improving Throughput for Downlink Multi user MIMO-LTE Advanced Networks using SINR approximation and Hierarchical CSI feedbackâ€, International Journal of Mobile Design Network and Innovation- Inderscience Publisher, ISSN : 1744-2850 vol. 6, no.1, pp. 14-23, May 2015.
[33] S.V.Manikanthan and K.srividhya "An Android based secure access control using ARM and cloud computing", Published in: Electronics and Communication Systems (ICECS), 2015 2nd International Conference on 26-27 Feb. 2015,Publisher: IEEE,DOI: 10.1109/ECS.2015.7124833.
[34] Ramya Usha Rani P, “Asymmetrical cascaded twenty seven level inverter based STATCOM†Revue Roumaine Des Sciences techniques– Serie Électrotechnique et Énergetique, Vol. 62, 4, pp. 411–416, 2017
[35] Usha Rani P and SRR, “Voltage Swell Compensation in an Interline Dynamic Voltage Restorerâ€, Journal of Scientific and Industrial Research, Vol.73, No.1, pp.29-32, 2014
[36] Usha Rani P. and Rama Reddy S, “Dynamic Voltage restorer using Space Vector PWM Control Algorithmâ€, European Journal of Scientific Research, Vol.56, No.4, pp.462-470, 2011.
[37] Usha Rani P. and Rama Reddy S, “Modeling and Simulation of Interline Dynamic Voltage Restorer for Voltage Sag/Swell Compensationâ€, Journal of Electrical Engineering, Romania Vol.11, No.3. pp.166-172, 2011
- [1] K. Sivakumar, A. Das, R. Ramchand, C. Patel, and K. Gopakumar, “A Five-level Inverter Scheme for a Four-pole Induction Motor Drive By Feeding the Identical Voltage-profile Windings From Both Sides,†IEEE Trans. Ind. Electron., vol. 57, no. 8, pp. 2776–2784, Aug. 2010.[2] C. Cecati, F. Ciancetta, and P. Siano, “A Multilevel Inverter for PV Systems With Fuzzy Logic Control,†IEEE Trans. Ind. Electron., vol. 57, no. 12, pp. 4115–4125, Dec. 2010
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How to Cite
Ramya, M., Usha Rani, P., Ganesan Subramanian, G., & Ramash Kumar, K. (2018). Neural network controller based sequential switch cascaded H-bridge multilevel inverter. International Journal of Engineering & Technology, 7(2.8), 592-598. https://doi.org/10.14419/ijet.v7i2.8.10527Received date: 2018-03-23
Accepted date: 2018-03-23
Published date: 2018-03-19