Design And Analysis of Analog TRNG Using Sample and Hold Circuit

  • Authors

    • B Aksshaya
    • G Madhura L. V.
    • Nivethashri S
    • Vishnuvarthini T
    • Mohankumar N
    2018-07-07
    https://doi.org/10.14419/ijet.v7i3.8.15222
  • Hardware Security, NIST Tests, Random noise, Sample and hold, TRNG.

  • Implementation of analog True random number generators is inevitable in almost all the security applications and encryption protocols nowadays. Although many digital True Random Number Generators are available, we proposed a method of random number generation using analog module of mixed signals. In actual fact generation of True Random Numbers is by utilizing the sample and hold circuit which is controlled by another random clock source, and a post processing circuit for generation of unpredictable binary sequence of numbers. The primary input source is an analog signal, essentially highly random noise from the external environment. The high unpredictability, less resource and simple circuit design are some highlights of the proposed work. Finally, the randomness is evaluated using NIST test suites and results are plotted and analyzed.

     

     

  • References

    1. [1] Avantika Yadav, Design and Analysis of Digital True Random Number Generator, Virginia Commonwealth University Richmond, Virginia (2013).

      [2] IhsanCicek, Ali EmrePusane, GunhanDundar, A novel design method for discrete time chaos based true random number generators, Elsevier Ltd. INTEGRATION ,the VLSI journal 47 (2014) 38-47.

      [3] Lakshmi Sreekumar, Dr. Ramesh P, Selection of an Optimum Entropy Source Design for a True Random Number Generator, Elsevier Ltd. Procedia Technology 25 ( 2016 ) 598 – 605.

      [4] Simona Buchovecka, RobertLórencz, Filip Kodýtek, JiríBucek, True random number generator based on ring oscillator PUF circuit, Elsevier Ltd. Microprocessors and Microsystems 53 (2017) 33-41.

      [5] Remya Justin, Binu K Mathew, Susan Abe, FPGA Implementation of High Quality Random Number Generator using LUT based Shift Registers, Elsevier Ltd. Procedia Technology 24 (2016) 1155 – 1162.

      [6] J. Szczepanski, E. Wajnryb, J.M. Amigo, Maria V. Sanchez-Vives, M. Slater, Biometric random number generators, Elsevier-Computers and Security (2004) 23, 77-84.

      [7] ShkodranGerguri, Vaclav Matyas, ZdenekRiha, LudekSmolik, Random Number Generation Based on Fingerprints, P. Samarati et al. (Eds.): WISTP 2010, LNCS 6033, pp. 170–182, 2010.

      [8] Hegui Zhu, Cheng Zhao, Xiangde Zhang, Lianping Yang, A novel iris and chaos-based random number generator, Computers and Security 36 (2013) 40-48.

      [9] Honorio Martin, Giorgio Di Natale, Luis Entrena, Towards a Dependable True Random Number Generator with Self-Repair Capabilities, IEEE Transactions on Circuits and Systems–I:, VOL. 65, NO. 1, January 2018.

      [10] Filip Veljkovic, Vladimir Rozic, Ingrid Verbauwhede, Low-Cost Implementations of On-the-Fly Tests for Random Number Generators, 978-3-9810801-8-6/DATE12/ conference@2012 EDAA.

      [11] JoãoDionísio, Tiago Mota, Iola Pinto, Manfred Niehus, Real Time Random Number Generator Testing, Elsevier Ltd. Procedia Technology 17 (2014) 534 – 541.

      [12] Mohammed Bakiri, Christophe Guyeux, Jean-François Couchot, AbdelkrimKamelOudjida, Survey on hardware implementation of random number generators on FPGA: Theory and experimental analyses, Elsevier Ltd. Computer Science Review 27 (2018) 135-153.

      [13] Shiva Prasad R., AnirudhSiripagada, SantthoshSelvaraj, Mohankumar N. "Random Seeding LFSR based TRNG for Hardware Security Applications", Proc. of 2nd Intl. Conf. on Integrated Intelligent Computing, Communication & Security (ICIIC-2018), 2018.

      [14] Ashok Kumar Mohan; Nirmala Devi M.; M. Sethumadhavan; Santhya R.,"A Selective Generation of Hybrid Random Numbers via Android Smart Phones

      [15] Manoj Reddy, Akshay K P, Giridhar R, Kharan SD, Mohankumar N, "BHARKS: Built-in hardware authentication using random key sequence, Proc of 4th IEEE Conference on Signal Processing Computing and Control (ISPCC), pp 200-204, Salon, 2017. DOI: 10.1109/ISPCC.2017.8269675

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  • How to Cite

    Aksshaya, B., Madhura L. V., G., S, N., T, V., & N, M. (2018). Design And Analysis of Analog TRNG Using Sample and Hold Circuit. International Journal of Engineering & Technology, 7(3.8), 69-73. https://doi.org/10.14419/ijet.v7i3.8.15222