Cross-Point Comparison of Multistage Non-Blocking Technologies

  • Abstract
  • Keywords
  • References
  • PDF
  • Abstract

    Multistage switching networks play important role in communication and computer network. They make communication nodes connect to each other. In computer hardware switches connect processors and memories. Initially, switches are arranged as one stage interconnection. As clients are growing, multistage is a must. The finding Clos multistage switching initiated multistage technologies. Benes improves Clos by reducing number of cross-points by using a 2 x 2 switch element and call re-routing. Batcher improves the technology by other way which is sorting destination address. Banyan is then joined to Batcher to simplify routing control. This paper analyses the number of cross-point required in Clos, Benes and Batcher Banyan to accomplish multistage switching architecture of 16, 64, 256, 1024 and 2048 input/output ports. As results, Clos cross-point is in averages 495.24% higher than Benes and 160.30% higher than Batcher Banyan. Clos blocking probabilities are closed to zero. Benes blocking probabilities are conditionally zero. Batcher Banyan blocking probabilities are zero.



  • Keywords

    Multistage switching, Clos, Benes, Batcher Banyan, Cross-points

  • References

      [1] Sani A, “Multistage switching hardware and software implementations for student experiment purpose,” IOP Conf. Ser. Mater. Sci. Eng., vol. 309, no. 1, p. 012097, 2018.

      [2] A. Putera, U. Siahaan, and R. Rahim, “Dynamic Key Matrix of Hill Cipher Using Genetic Algorithm,” Int. J. Secur. Its Appl., vol. 10, no. 8, pp. 173–180, Aug. 2016.

      [3] R. Rahim, “Man-in-the-middle-attack prevention using interlock protocol method,” ARPN J. Eng. Appl. Sci., vol. 12, no. 22, pp. 6483–6487, 2017.

      [4] C. Clos, “A Study of Non-Blocking Switching Networks,” Bell Syst. Tech. Journal., 1953.

      [5] Opferman D.C. and Tsao-Wu, “On a Class of Rearrangeable Switching Networks,” Bell Syst. Tech. Journal, vol. 50, no. 5, 1981.

      [6] L. E. and Z. S.Q., “Parallel routing algorithms for non blocking electronic and photonic switching networks,” IEEE Trans. Parallel Distrib. Syst., vol. 16, no. 8.

      [7] S. Chakrabarty, A., Collier, M., Mukhopadhyay, “Matrix-Based Nonblocking Routing Algorithm for Benes Networks,” Comput. World Futur. Comput. Serv. Comput. Cogn. Adapt. Content, Patterns.

      [8] A. Karimi, “Introduction And Analysis Of Optimal Routing Algorithm In Benes Networks,” Int. Conf. Robot PRIDE 2013-2014 - Med. Rehabil. Robot. Instrum.

      [9] L. G. V. G. F. Lev, N. Pippenger, “A Fast Parallel Algorithm for Routing in Permutation Networks,” IEEE Trans. Comput., vol. 30, no. 2, pp. 93–100, 2015.

      [10] T. Listyorini and R. Rahim, “A prototype fire detection implemented using the Internet of Things and fuzzy logic,” World Trans. Eng. Technol. Educ., vol. 16, no. 1, pp. 42–46, 2018.

      [11] D. Subramaniam et al., “A Stacked Planar Antenna with Switchable Small Grid Pixel Structure for Directive High Beam Steering Broadside Radiation,” Int. J. Eng. Technol., vol. 7, no. 2.5, pp. 122–127, Mar. 2018.

      [12] I. R. Quadri, “Modeling of Topologies of Interconnection Networks based on Multidimensional Multiplicity.,” Rap. Rech. Inst. Natl. Rech. En Inform. En Autom., pp. 5–16, 2007.

      [13] G. J. Goke L.R. dan Lipovski, “Banyan Networks for Partitioning Multiprocessing Systems,” in Proceeding 1st Annual Computer Architecture Conference, 1973, pp. 21–28.

      [14] V. E. Benes, “On Rearrangeable Three-Stage Connecting Networks.,” Bell Syst. Tech. Journal., 1962.

      [15] K. E. Batcher, “Sorting Networks and Their Applications,” Spring Jt. Comput. Conf. Goodyear Aerosp. Corp. Akron, Ohio, vol. 32, pp. 307–314, 1968.

      [16] M. J. Narashima, “The Batcher-Banyan Self-Routing Network: Universality and Simplification,” IEEE Trans. Commun., vol. 36, no. 10, 1988.

      [17] C. Y. Lee, “Analysis of Switching Networks,” Bell Syst. Tech. Journal., 1955.

      [18] B. Dally, William J. and Towles, Principles and Practices of Interconnection Networks. Morgan Kaufmann Publishers: San Francisco.

      [19] M. Zulfin, “Perbaikan Internal Blocking Jaringan Switching Banyan dengan Penyortir Batcher,” J. Ilm. Teknol. Harapan, vol. 5, no. 2, 2015.

      [20] J. H. Patel, “Performance of Processor-Memory Interconnections for Multiprocessors,” IEEE Trans. Comput., vol. 30, no. 10, 1981.

      [21] D. K. Hunter, “Encyclopedia of Information Technology,” Encyclopedia of Information Technology. Marcel Dekker, New York., p. Vol. 42 No.27, 1997.




Article ID: 15348
DOI: 10.14419/ijet.v7i3.2.15348

Copyright © 2012-2015 Science Publishing Corporation Inc. All rights reserved.