Implementation of Full Adder Using 5-Input Majority Gate
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2018-09-15 https://doi.org/10.14419/ijet.v7i4.4.19598
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Full-Adder, Five-Input Majority Gate, Energy Efficient, Verification. -
Abstract
In this paper full adder was created employing five-input majority gate according to Quantum-Dot Cellular Automata (QCA) innovation. We used the QCA logic in our modified structure to reduce the delay. That report details the structure furthermore investigate associated with QCA dependent 1-bit full adder design for minimal energy purposes. This method permits decreasing energy expenditure, delay, additionally location involving electronic circuits.
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References
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How to Cite
Erniyazov, S., & Cheol Jeon, J. (2018). Implementation of Full Adder Using 5-Input Majority Gate. International Journal of Engineering & Technology, 7(4.4), 17-18. https://doi.org/10.14419/ijet.v7i4.4.19598Received date: 2018-09-12
Accepted date: 2018-09-12
Published date: 2018-09-15