Performance Analysis and Low Power Design of Voltage Level-up Shifters

  • Authors

    • B. Srikanth
    • Rameswari Nayak
    • Sangeeta Singh
    • V. Harini
    2018-11-27
    https://doi.org/10.14419/ijet.v7i4.19.22022
  • Current mirrors, Dual supply voltages, Level-up shifter, Process variation, Sub threshold operation.

  • Voltage level-up shifters are widely used in dual supply applications and it acts as an interface between main core and input-output units. Low power with efficient level-up shifter is designed by reducing the transistor count and the proposed level-up shifters are capable of converting from sub-threshold to above threshold level signal. The strength of pull-down networks and pull-up networks are enhanced by employing a couple of current mirror circuits. The simulation results of the proposed level shifter in 180nm technology yields a power dissipation of 95.79nw, propagation delay of 41.23ns for an input voltage of 0.4V and input frequency of 1MHz, low supply voltage VDDL=0.4V, high supply voltage VDDH=1.8V. Proposed 14T Level shifter in 90nm Technology demonstrates a power dissipation of 54.8nw, propagation delay of 28.8ns for an input voltage of 0.2V and input frequency of 1MHz, VDDL=0.2V, VDDH=1.2V.

     

     

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  • How to Cite

    Srikanth, B., Nayak, R., Singh, S., & Harini, V. (2018). Performance Analysis and Low Power Design of Voltage Level-up Shifters. International Journal of Engineering & Technology, 7(4.19), 76-82. https://doi.org/10.14419/ijet.v7i4.19.22022