Page Enabled FSM Model For Multi Rate- High Throughput Regex Pattern Matching System

Abstract

In recent years demands for high throughput NIDS systems are emerged with compatible Wildcard support for the detection of irregular patterns like ClamAV. In this work we presented a single-compound FSM based state transition controller for regular ASCII based patterns and counter enabled score generation model for regex patterns which contains both repeated characters and don’t cares void segments. In many existing digital NIDS systems are token-stream based approaches were used with dedicated memory units to accommodate byte oriented matching with moderate network payload speed. The NIDS efficiency is largely depends on both intrusion byte size and the size of database. To mitigate this problem memory based digital NIDS system requires coordinated pattern matching. In this work, FSM based one hot state encoding model with bit wise state transition controller is proposed which gives both parallel task and high throughput payload validity check. Here during the payload monitoring if input segments are aggregated as tokens, the state transition controller is used to enable the counter for token model and state transitions are carried out based on the regex patterns received and the concurrent matches that are halted in parallel manner. To avoid clock synchronization over concurrent matching process and variable rate matching process page wise integration of each sub groups are carried out which is driven by ADPLL unit. The performance metrics of FSM state controlled payload monitoring is proved in terms of speed and memory efficiency over state-of-art-the-art methods. Here in our proposed NIDS system consumes lesser memory resources and it is verified through comparison with state-of-the-art methods.