Hardware Platform Design Analysis of K-Means Clustering Algorithm Implementation
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2018-12-16 https://doi.org/10.14419/ijet.v7i4.40.24082 -
Centroid, Clustering, FPGA, Hardware, K-Means. -
Abstract
The K-Means clustering algorithm is an unsupervised data mining technique and it has also been used widely to solve the problem in real life. This paper addresses a design analysis of the algorithm of K-Means that is implemented in the field programmable gate arrays (FPGAs). These devices are integrated circuits and have a hardware platform and applied in many implementations. The K-Means clustering algorithm has a simple method that is choosing objects from data to become the center point or centroid and then assign each object to the cluster which is nearest and update the cluster means. The approach of the software can also be implemented in the hardware, but both of them have a different method in programming. Â
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References
[1] SC Candrakala, TSG Basha & K Anjani (2014), Implementation of medical image segmentation using K-Means clustering technique on FPGA. International Journal of Science, Engineering and Technology Research, Vol. 3, Issue 10, 2861-2867
[2] Wibowo FW (2011), Interoperability of Reconfiguring System on FPGA Using a Design Entry of Hardware Description Language, Proceedings of the 2011 Computation and Communication Technologies: 3rd International Conference on Advances in Computing, Control, and Telecommunication Technologies, ACT 2011 - Computer Science Series 1, pp. 79-83
[3] Ying HX, Miquel V, Beñat A, Javier D, Carlos A, Daniel JG, Xavier M & Filippo M (2017), Implementation of the K-means algorithm on heterogeneous devices: a use case based on an industrial dataset, Advances in Parallel Computing, pp. 642-651.
[4] D. Lee, Alric A, Dustin R & Ryan K (2017), A streaming clustering approach using a heterogeneous system for big data analysis, Proceedings of the 2017 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), pp. 699-706
[5] Yuk MC & Hayden KHS (2014), Map-reduce processing of K-means algorithm with FPGA-accelerated computer cluster, Proceedings of the 2014 IEEE 25th International Conference on Application-Specific Systems, Architectures and Processors, pp. 9-16.
[6] José C, FPGA implementation of a multi-processor for cluster analysis, unpublished
[7] Wibowo FW (2015), https://www.scopus.com/record/display.uri?eid=2-s2.0-84960464778&origin=resultslist&sort=plf-f&src=s&sid=edf8949865b72f413b39c8b48ca23d8d&sot=autdocs&sdt=autdocs&sl=18&s=AU-ID%2855443377300%29&relpos=26&citeCnt=1&searchTerm=">Implementation of Viterbi algorithm based-on field programmable gate array for wireless sensor network, https://www.scopus.com/sourceid/19700181106?origin=resultslist">Advanced Science Letters, Vol. 21, No. 11, pp. 3521-3525
[8] Awos K, Fayez G & Atef I (2016), Fast and area-efficient hardware implementation of the K-Means clustering algorithm, WSEAS Transactions on Circuits and Systems, Vol. 15, pp. 133-142
[9] Hanna MH, Khaled B, Huseyin S & AT Erdogan (2011), FPGA implementation of K-Means algorithm for bioinformatics application: an accelerated approach to clustering microarray data, Proceedings of the 2011 NASA/ESA Conference on Adaptive Hardware and Systems (AHS)
[10] Wibowo FW, (2018), Implementation of FPGA in index data storage as database, International Journal of Engineering & Technology.
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How to Cite
Wahyu Wibowo, F., ., S., & Sulistiyono, M. (2018). Hardware Platform Design Analysis of K-Means Clustering Algorithm Implementation. International Journal of Engineering & Technology, 7(4.40), 90-93. https://doi.org/10.14419/ijet.v7i4.40.24082Received date: 2018-12-16
Accepted date: 2018-12-16
Published date: 2018-12-16