Designing a dual core processor system to act as multi rate filter using embedded design techniques
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2019-04-07 
https://doi.org/10.14419/ijet.v7i4.24688
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Embedded Design Techniques, Message Passing Interface, Multi Processor Systems, Multistage Filtering, Single Instruction Single Data Programming Mode. -
Abstract
Parallel computing represents an effective Technique for reducing program execution time especially with applications that necessitate repeated computations as multistage filtering systems. The paper aims to design a dual core processor system with message passing interface communication mode to be configured on Spartan 6E FPGAs slice. C language is used to program the configured system in a single instruction single data programming mode to act as multi stages filters. Embedded design techniques were used to construct the system hardware part, while the software part of the system is developed using the software development kit associated with Xilinx integrated software environment ISE13.2. A speed up in execution time is achieved by the designed system over single processor system. It is observed that the speed up ratio improves as the number of filtering stages increases.
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How to Cite
Rejab Khalil, M. (2019). Designing a dual core processor system to act as multi rate filter using embedded design techniques. International Journal of Engineering & Technology, 7(4), 5640-5644. https://doi.org/10.14419/ijet.v7i4.24688Received date: 2018-12-23
Accepted date: 2019-03-17
Published date: 2019-04-07