VHDL Implementation of low power turbo coded OFDM physical layer for wireless communication

  • Authors

    • Yanita Shrimali
    • Janki Ballabh Sharma
    • R. S. Meena
    2018-09-22
    https://doi.org/10.14419/ijet.v7i4.5.25054
  • Turbo Coding, OFDM, FFT/IFFT.

  • Abstract

    Orthogonal Frequency Division Multiplexing (OFDM) is exceptionally favored system for rapid information transmission over remote channel. In this paper, VHDL implementation of low power turbo-coded OFDM (TCOFDM) Physical layer architecture is presented. In this architecture a low power memory-less pipelined FFT processor and Log-map turbo encoder/decoders are used to provide high throughput and lower complexity. Log-map turbo decoder provides high speed with good error correction capacity, while FFT/IFFT processor with single delay feedback (SDF) memory less architecture provide improved area and power efficiency. Proposed TCOFDM system is implemented using Xilinx ISE Design suite in the simulation results shows that the proposed scheme is having low power, high speed, high throughput and smaller area in comparison to other schemes.

     

     

  • References

    1. [1] M. A. Mohamed, “FPGA Synthesis of VHDL OFDM Sys- temâ€, Wireless Personal Communication june 2013, Vol- ume 70, Issue 4, pp 1885–1909 (2013) 70:1885–1909. Springer, US (2013).

      [2] F.Angarita, M. J. Canet, T. Sansaloni and J. Valls, “Architec- tures for the Implementation of a OFDM-WLAN Viterbi De- coderâ€, Journal of Signal Processing Systems 52, 35–44, Springer (2008* 2007 ).

      [3] Inderjeet Kaur, Dr. Y.K.Mathur, “Improving BER using tur- bo codes in OFDM systemsâ€, International Journal of Scien- tific & Engineering Research, Volume 3, Issue 7 ISSN 2229- 5518 IJSER, July-(2012).

      [4] Yung-Chih Tsa , Shang-Kang Deng, Kuan-Cheng Chenand Mao-Chao Lin, “Turbo Coded OFDM for Reducing PAPR and Error Ratesâ€, IEEE Transactions on Wireless Communi- cations, vol. 7, no. 1, january 2008

      [5] Maxime Flament, Bartosz Mielczarek and Arne Svensson, “Joint Channel Estimation and Turbo Decoding for OFDM- based Systemsâ€, Department of Signals and Systems, Chalmers University of Technology, SE-412 96 Gothenburg, Sweden.

      [6] Si Lia, ThoLe-Ngoca, Soon ChanK wonb, Jong-Soo Seob, “Turbo joint channel estimation, synchronization, and decod- ing for coded OFDM systemsâ€, Int. J.Electron, Commun, (AEÃœ) 64 (2010) 663–670 april (2009).

      [7] Xuan Huan Nguyen and Jinho Choi, “Iterative channel esti- mation and turbo decoding in OFDM systemsâ€,IEEE 62th Viechicular Technology conference, 0-7803-9152-7Print ISSN: 1090-3038,January(2006).

      [8] Said elnoubi, sherif elbadawy and chawki shaban, “Perfor- mance of turbo coded OFDM system with comb pilot Chan- nel estimation in rayleigh fading channelâ€, IEEE Military communication conference 0-7803-7484-3/02/$17.00 02002, january (2009).

      [9] Yanhui Tong, Tet –Hin Yeap and J-Yves Chouinard, “VHDL Implementation of a Turbo Decoder with Log-Map-Based Iterative Decodingâ€, IEEE Transactions on Instrumentation and Measurement, Vol. 53, No. 4, August (2004).

      [10] Yu, M. H. Yen, P.A.Hsiung, and S.-J.Chen, “A low-Power 64- point pipeline FFT/IFFT processor for OFDM applica- tions†,IEEE Transactions consumers Electron, vol.57,no. 1, pp.40-45,Feb(2011).

      [11] WANG Xiu-fang, HOU Zhen-long, “Design and Implement of FFT Processor for OFDMA System Using FPGA†, Inter- national Conference on Mechanical and Electronics Engi- neering (ICMEE 2010).

      [12] I. S. Correa, L. C. Freitas, A. Klautau and J. C. W. A. Costa, “VHDL Implementation of a Flexible and Synthesizable FFT Processorâ€, IEEE Latin America Transactions ,Vol. 10,No. 1,Jan(2012).

      [13] R.Panchal, R.Gedam, “VHDL Implementation of Reconfigu- rable Multimode Block Interleaver for OFDM Based WLANâ€, International Journal of Advanced Research in Electronics and Communication Engineering (IJARECE)Volume 1, Issue 4, October 2012.

      [14] Shahriar Shahabuddin, Janne Janhunen, Muhammet Fatih Bayramoglu,Markku Juntti, Amanullah Ghazi, and Olli Silv´en, “Design of a Unified Transport Triggered Processor for LDPC/Turbo Decoderâ€, IEEE International Conference on Embedded system288 – 295 (2012).

  • Downloads

  • How to Cite

    Shrimali, Y., Ballabh Sharma, J., & S. Meena, R. (2018). VHDL Implementation of low power turbo coded OFDM physical layer for wireless communication. International Journal of Engineering & Technology, 7(4.5), 665-668. https://doi.org/10.14419/ijet.v7i4.5.25054

    Received date: 2018-12-30

    Accepted date: 2018-12-30

    Published date: 2018-09-22