Enhanced Carrier Level Shifted PWM Technique for Capacitor Voltage Balance in Five-Level DCMLI

  • Authors

    • K. Narasimha Raju
    • P. Siva Sankar
    • CH. S.Balasubrahmanyam
    • B. Sai Sandeep Babu
    https://doi.org/10.14419/ijet.v7i4.22.28695
  • Five-Level DCMLI, Neutral Point, Capacitor Voltage Balance, Medium High Power Drives, STATCOM, FACTS, HVDC, Renewable Energy Conversion.

  • Abstract

    An Inherent problem with the Diode Clamped Multi Level Inverter is the unbalance in capacitor voltages. This unbalance may lead the inverter to have uneven levels of output voltage and more THD as compared to the expected. Therefore, the stabilization of neutral point voltage is the major task to get expected voltage and the desired levels. There are techniques, which are reliable for the neutral point stabilization of three-level diode clamped multilevel inverters, but there is no specific reliable technique, which would provide inherent stabilization of capacitor junction voltages in the five-level diode clamped multilevel inverters. Existing techniques use either back to back connection of five-level inverter-rectifier or use separate DC sources (SDCS). These methods use extra components and are complex to implement. To overcome this problem a new   inherent control technique entitled as ‘Enhanced Carrier Level Shifted PWM Technique’ is recommended in this paper to stabilize the capacitor junctions in five-level diode clamped multilevel inverter (DCMLI).

     

     

     

  • References

    1. [1] J. Rodriguez, S. Bernet, P. K. Steimer and I. E. Lizama, "A Survey on Neutral-Point-Clamped Inverters," in IEEE Transactions on Industrial Electronics, vol. 57, no. 7, pp. 2219-2230, July 2010.

      [2] R. M. Tallam, Rajendra Naik and T. A. Nondahl, "A carrier-based PWM scheme for neutral-point voltage balancing in three-level inverters," Applied Power Electronics Conference and Exposition, 2004. APEC '04. Nineteenth Annual IEEE, 2004, pp. 1675-1681 Vol.3.

      [3] J Rodriguez, J S. Lai, and F. Z Peng, "Multilevel Inverters A Survey of Topologies, Controls, and Applications," IEEE Trans. Ind Electron.,vol. 49, no. 4, pp. 724-736, Aug. 2002.

      [4] Z. Pan, F. Z. Peng, K. A. Corzine, V. R. Stefanovic, J. M. Leuthen, and S. Gataric, “Voltage balancing control of diode-clamped multilevel recti- fier/inverter systems,†IEEE Transactions on Industry Applications, vol. 41, no. 6, pp. 1698–1706, Nov 2005.

      [5] S. Kouro, M. Malinowski, K. Gopakumar, J. Pou, L. G. Franquelo, B. Wu, J. Rodriguez, M. A. Perez, and J. I. Leon, “Recent advances and industrial applications of multilevel converters,†IEEE Transactions on Industrial Elec- tronics, vol. 57, no. 8, pp. 2553–2580, Aug 2010.

      [6] K. N. Raju, M.V.G. Rao, and M. Ramamoorthy, “Hybrid modulation technique for neutral point clamped inverter to eliminate neutral point shift with minimum switching loss,†in TENCON 2015 - 2015 IEEE Region 10 Confer- ence, Nov 2015.

      [7] K. N. Raju and V. G. R. Mannam, “An effective carrier based pwm technique for neutral point voltage stabilization of three level inverter,†in 2014 Interna- tional Conference on Smart Electric Grid (ISEG), Sept 2014.

      [8] Ms. D. Sindhuja and Mr. V. Yuvaraju M.E. “Five Level Active Neutral Point Clamped Converter based STATCOMâ€, IRJET volume: 03 Issue: 04 | Apr-2016.

      [9] Kuthuri Narasimha raju, Chandra Sekhar Obbu, M Ramamoorthy, " Appropriate switching state selection to Avoid capacitor imbalance in five-level NPC," International Journal of Power Electronics and Drives (IJPEDS) vol. 9, no. 1, pp. 676-681, 2018.

      [10] Fang Zheng Peng, Jih-Sheng Lai, J. McKeever and J. VanCoevering, "A multilevel voltage-source converter system with balanced DC voltages," Power Electronics Specialists Conference, 1995. PESC '95 Record., 26th Annual IEEE, Atlanta, GA, 1995, pp. 1144-1150 vol.2.

      [11] L. M. Grzesiak and J. G. Tomasik, "Novel DC Link Balancing Scheme In Five-Level Back-To-Back Converter System," EUROCON 2007 - The International Conference on "Computer as a Tool", Warsaw, 2007, pp. 1929-1934.

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  • How to Cite

    Narasimha Raju, K., Siva Sankar, P., S.Balasubrahmanyam, C., & Sai Sandeep Babu, B. (2018). Enhanced Carrier Level Shifted PWM Technique for Capacitor Voltage Balance in Five-Level DCMLI. International Journal of Engineering & Technology, 7(4.22), 192-196. https://doi.org/10.14419/ijet.v7i4.22.28695

    Received date: 2019-03-31

    Accepted date: 2019-03-31