An efficient high speed, high frequency domino-logic based circuit

  • Authors

    • Mahdi Zare Department of Electronic Engineering, Shahr-e-Qods Branch, Islamic Azad University, Tehran, Iran
    • Hossein Manouchehrpour Department of Electronic Engineering, Shahr-e-Qods Branch, Islamic Azad University, Tehran, Iran
    • Ahmad Esmaeilkhah Department of Electronic Engineering, Shahr-e-Qods Branch, Islamic Azad University, Tehran, Iran
    2018-03-04
    https://doi.org/10.14419/ijet.v7i2.8219
  • VLSI, Domino Logic, Power, Delay, PDP.

  • As the Very Large-Scale Integration (VLSI) techniques are mostly focused on high-speed and low power consumption circuits, various techniques and technologies were investigated to gain these two precious goals. Domino-logic is one of the circuits which is regarded to have high speed, high frequency and low power consumption. This work proposes a Domini logic circuit which has improved PDP compare to the previous one. The suggested circuit was simulated and the attained results show a considerable improvement in circuit’s speed in respect with its ancestor. The PDP of the circuit in 90 nm, biased at 1V, has been calculated as 53% approximately improvement. This improvement for PDP in 65 nm, 45 nm and 32 nm are 48%, 47% and 51% respectively.  

  • References

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  • How to Cite

    Zare, M., Manouchehrpour, H., & Esmaeilkhah, A. (2018). An efficient high speed, high frequency domino-logic based circuit. International Journal of Engineering & Technology, 7(2), 252-255. https://doi.org/10.14419/ijet.v7i2.8219