An Improved Hybrid PWM Technique for DC Capacitors Voltage Balance of Five Level DCMLI

  • Authors

    • Narasimha Raju.K koneru lakshmaiah education foundation
    • G.D.V. Sai Pavan.G koneru lakshmaiah education foundation
    • S.V. Harish.S
    • Vignesh. R
    2018-04-20
    https://doi.org/10.14419/ijet.v7i2.9799
  • Capacitor balance, DCMLI, Five-level, High power Drives, Space vector PWM, Switching Stress
  • The innate problem with five-level Diode Clamped Multi Level Inverter (DCMLI) is imbalance in supply DC capacitor voltages. This paper presents a novel Hybrid Pulse Width Modulation (PWM) technique to stabilize the capacitor voltages. The unbalance in capacitor voltages leads to decrement in inverter level, increase in switching stress and distortion in the output voltage. The existing solutions to this problem use either a back to back connection of inverter and rectifier or external dc sources for each capacitor, but there isn’t a solution which would inherently balance the capacitor voltages of five levels and above for DCMLI. To rectify this problem a novel hybrid PWM technique which is combination of Carrier based PWM (CBPWM) and Space Vector Modulation (SVM) is proposed. As per this technique conventional CBPWM is applied to meet the load demand and SVM is applied at certain selective intervals to balance the capacitors. The novelty lies in selection of appropriate switching state and the interval at which it must be applied to balance the capacitor voltages. This technique is simple to implement and gives rise to less switching losses.

  • References

    1. [1] Georgios I. Orfanoudakis, Michael A. Yuratich, and Suleiman M. Sharkh “Hybrid Modulation Strategies for Eliminating Low-Frequency Neutral-Point Voltage Oscillations in the Neutral-Point-Clamped Converter,†IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 28, NO. 8, AUGUST 2013.

      [2] P. N. Tekwani R. S. Kanchan, and K. Gopakumar “A Dual Five-Level Inverter-Fed Induction Motor Drive with Common Mode Voltage Elimination and DC-Link Capacitor Voltage Balancing Using Only the Switching-State Redundancy—Part I,†IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 54, NO. 5, OCTOBER 2007.

      [3] K. Narasimha Raju M. Venu Gopala Rao M.Ramamoorthy “Hybrid Modulation Technique for Neutral Point Clamped Inverter to eliminate neutral point shift with minimum switching loss,†TENCON CONFERENCE, ISBN:978-1-4799-864,2015 IEEE.

      [4] Rangarajan M. Tallam, Rajendra Naik and Thomas A. Nondahl “A Carrier-Based PWM Scheme for Neutral-Point Voltage Balancing in Three-Level Inverters,†IEEE TRANSACTIONS ON INDUSTRY APPLICATIONS, VOL. 41, NO. 6, NOVEMBER/DECEMBER 2005.

      [5] J Rodriguez, J S. Lai, and F. Z Peng, “Multilevel Inverters A Survey of Topologies, Controls, and Applications," IEEE Trans. Ind Electron., vol. 49, no. 4, pp. 724-736, Aug. 2002

      [6] J... Zaragoza, J Pou, S Ceballos, E. Robles, P lb· a-nez, and J L.Villate, "A comprehensive study of a hybrid modulation technique for the neutral point-clamped converter," IEEE Trans.

      [7] Ind Electron. vol. 56, no. 2, pp. 294-304, Feb. 2009Jose Rodriguez, Steflen Bernet, Peter K. Steimer ," A Survey on Neutral-Point-Clamped Inverters," IEEE Trans. Ind Electron., vol. 57, no. 7,pp. 2219-2230, July 2010.

      [8] A. K. Gupta and A. M. Khambadkone, “A space vector PWM scheme for multilevel inverters based on two-level space vector PWM,†IEEE Trans. Ind. Electron., vol. 53, no. 5, pp. 1631–1639, Oct. 2006.

      [9] J. Rodriguez, S. Bernet, B. Wu, J. O. Pontt, and S. Kouro, “Multilevel Voltage-source-converter Topologies for Industrial Medium-voltage Drives,†IEEE Trans. Ind. Electron., vol. 54, no. 6, pp. 2930–2945, Dec. 2007.

      [10] Z. Zhao, J. Zhao and C. Huang, "An Improved Capacitor Voltage-Balancing Method for Five-Level Diode-Clamped Converters with High Modulation Index and High-Power Factor," in IEEE Transactions on Power Electronics, vol. 31, no. 4, pp. 3189-3202, April 2016.

  • Downloads

  • How to Cite

    Raju.K, N., Pavan.G, G. S., Harish.S, S., & R, V. (2018). An Improved Hybrid PWM Technique for DC Capacitors Voltage Balance of Five Level DCMLI. International Journal of Engineering & Technology, 7(2), 591-596. https://doi.org/10.14419/ijet.v7i2.9799