KUMAR, M Siva; KUMAR TULASI, Sanath; SRINIVASULU, N; LAKSHMI BANDI, Vijaya; HARI KISHORE, K. Bit wise and delay of vedic multiplier. International Journal of Engineering & Technology, [S. l.], v. 7, n. 1.5, p. 26–30, 2017. DOI: 10.14419/ijet.v7i1.5.9117. Disponível em: https://sciencepubco.com/index.php/ijet/article/view/9117.. Acesso em: 5 dec. 2024.