V. Narasimha Nayak, M. Ravi Kumar, K. Anusha, and C. Kranthi Kiran, “FPGA based asymmetric crypto system design”, IJET, vol. 7, no. 1.1, pp. 612–617, Dec. 2017, doi: 10.14419/ijet.v7i1.1.10788.