K. A. Jyotsna, P. Satish Kumar, B. K. Madhavi, and I. Swaroopa, “Implementation of 16 Bit SAR ADC in CMOS and sub threshold cml techniques”, IJET, vol. 7, no. 2.12, pp. 257–260, Apr. 2018, doi: 10.14419/ijet.v7i2.12.11298.