REDDY, Varun; M, Nirmala Devi. FPGA Realization of Deep Neural Network for Hardware Trojan Detection. International Journal of Engineering & Technology, [S. l.], v. 9, n. 3, p. 764–769, 2020. DOI: 10.14419/ijet.v9i3.30946. Disponível em: https://sciencepubco.com/index.php/ijet/article/view/30946.. Acesso em: 23 nov. 2024.