Siva Kumar, M, S Syed Shameem, M.N.V. Raghu Sai, Dheeraj Nikhil, P. Kartheek, and K Hari Kishore. “Efficient and Low Latency Turbo Encoder Design Using Verilog-Hdl”. International Journal of Engineering & Technology 7, no. 1.5 (December 31, 2017): 37–41. Accessed December 5, 2024. https://sciencepubco.com/index.php/ijet/article/view/9119.