1.
Owusu-Ansah Antwi A, Ryoo K. Hardware Design of AES Core with High Throughput and Low Area. IJET [Internet]. 2018 Aug. 10 [cited 2024 Nov. 23];7(3.24):258-63. Available from: https://sciencepubco.com/index.php/ijet/article/view/22659